The technical field is storage systems used within microprocessors.
Buffers are commonly used in modern computer systems for temporary storage of information passing from a sending functional unit to a receiving functional unit, until the information can be accepted and used by the receiving functional unit. This structure allows the sending functional unit to continue to process new requests, and possibly send additional information to the receiving functional unit, even though the receiving functional unit is not ready to accept the additional information. If the buffer has sufficient capacity (has enough entries), the buffer will absorb typical bursts of information transfers, avoiding the need to stall the sending functional unit, and improving the overall performance of the computer system.
In a microprocessor, an instruction dispersal unit (the sending functional unit) may issue several types of instructions to various execution units (the receiving units) that have long or indeterminate latencies to accept those instructions. Furthermore, after processing the instructions, those receiving functional units may in turn become sending functional units as they pass information on to other execution units. A typical architecture would implement several distinct buffers: one between each pair of sending and receiving functional units. The disadvantage of this approach is that each buffer may require a lot of area and circuitry, since one data storage element (flip-flop) is needed for each bit of information in every buffer entry, and each buffer should have enough entries to accommodate typical data bursts. Alternatively, to save area and circuitry, the depth of each buffer may need to be reduced below its optimum size. Then, since each buffer is independent, one buffer may fill even though other buffers are idle, causing extra stalls and reducing system performance.
To overcome the above-mentioned problems associated with multiple independent buffers, a master tracking buffer is created that uses this same buffer structure for several types of long- or intermediate-latency instructions, and for tracking instructions as the instructions progress through all of the necessary functional units until the instructions are retired. The master tracking buffer uses additional control bits to perform the tracking function. However, the master tracking buffer requires only a few additional flip-flops over the number of flip-flops found in a single traditional buffer of equivalent depth. Furthermore, the benefits of the master tracking buffer can be shared among all data transfer paths it buffers. This is in contrast to multiple independent buffers where some buffers may sit idle even when additional buffering is required somewhere else in the system.
The basic structure of the tracking buffer is a shifting queue. When a new instruction to be tracked is issued by the instruction dispersal unit, information for that instruction is stored as the top entry in the tracking buffer, and all existing buffer entries shift down. In an embodiment, at most one tracked instruction is issued per clock cycle. In another embodiment, more than one tracked instruction may be issued and stored in the tracking buffer per clock cycle. In this alternative embodiment, the tracking buffer must be able to shift existing buffer entries down by a multiple number of entries.